vhdl调试时的错误问题

编译时实在看不出错在哪里

Error (10500): VHDL syntax error at clktrans.vhd(22) near text "="; expecting "(", or "'", or "."
Error (10500): VHDL syntax error at monostable.vhd(15) near text "Variable"; expecting "end", or "(", or an identifier ("variable" is a reserved keyword), or a concurrent statement
Error (10500): VHDL syntax error at monostable.vhd(16) near text "Variable"; expecting "end", or "(", or an identifier ("variable" is a reserved keyword), or a concurrent statement

--DifferPD.vhd文件的程序代码
Library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
Entity DifferPD is
     Port ( rst:in std_logic; 
        clk_32:in std_logic;
        datain:in std_logic_vector(5 downto 0);
        clk_i:in std_logic;
        clk_q:in std_logic;
        pd_bef:out std_logic;
        pd_aft:out std_logic);
end Entity DifferPD;

Architecture Behavioral of  DifferPD  is
--定义程序中用到的信号
Signal din,din_edge:std_logic;
begin
   --去输入数据的符号位为码元起始相位
   Din<=datain(5);
   --输入信号微分整流，检测输入信号跳变沿后，产生一个clk32时钟周期的高           
   --电平脉冲
   process(rst,clk32)
   begin
         if  rst="1"then
            din_d<="0";
          
         elsif rising_edge(clk32) then
              din_d <=din;
              din_edge <=(din  xor din_d);
              --完成鉴相功能
              pd_bef <=din_edge  and  clk_i;
              pd_aft <=din_edge  and  clk_q;
         end  if;
     end  process ;
end  Behavioral;

Library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
Entity monostable is
     Port (clk32,rst:in std_logic; 
        din:in std_logic;
        dout:out std_logic);
       
end  Entity monostable;
Architecture Behavioral of monostable is
   --单稳态触发器：检测到一个高电平脉冲后，输出4个clk32时钟周期高电平
begin
  Variable c:std_logic_vector(1 downto 0);
  Variable start:boolean;
 process(rst,clk32)
   begin 
    if rst=1 then
          c:=00;
          start:=false;
          dout<=0;
    elsif rising_edge(clk32) then
          if din=1 then
            Start:=ture;
            dout<=1;
           end if;
           if start then
              dout<=1;
              if c<3 then
                 c:=c+1;
              else
                 start:=false;
              end if;
           else
               c:=00;
               dout<=0;

              end if;
          end  if;             
   end process;
 end Behavioral ;