module digital_tube(clk,tube0,tube_seg,rst_n);
input clk;
input rst_n;
output tube0;
output reg[6:0]tube_seg;
reg tube0;
reg[31:0] timer;
reg[31:0] counter;
reg[1:0] num;
always@(posedge clk or negedge rst_n)
begin
tube0 <= 1'b0;
timer <= 32'd0;
counter <= 32'd0;
num <= 2'd0;
if(timer == 32'd500_000_000)
timer <= 32'd0;
else
timer <= timer + 32'd1;
end
begin
if(counter == 32'd4_999_999)
begin
num = num + 2'd1;
counter <= 32'd0;
end
else if(num == 2'd10)
num <= 2'd0;
else
counter = counter + 32'd1;
end
always@(num)
case(num)
2'd00:tube_seg<=7'b0_111_111;
2'd01:tube_seg<=7'b0_000_110;
2'd02:tube_seg<=7'b1_011_011;
2'd03:tube_seg<=7'b1_001_111;
2'd04:tube_seg<=7'b1_100_111;
2'd05:tube_seg<=7'b1_101_101;
2'd06:tube_seg<=7'b1_111_101;
2'd07:tube_seg<=7'b0_000_111;
2'd08:tube_seg<=7'b1_111_111;
2'd09:tube_seg<=7'b1_100_111;
default:tube_seg<=8'b0000_0000;
endcase
endmodule
